摘要 :
Tailoring the operating voltage to fine-grain temporal changes in the power and performance needs of the workload can effectively enhance power efficiency. Therefore, power-limited computing platforms of today widely deploy integr...
展开
Tailoring the operating voltage to fine-grain temporal changes in the power and performance needs of the workload can effectively enhance power efficiency. Therefore, power-limited computing platforms of today widely deploy integrated (i.e., on-chip) voltage regulation which enables fast fine-grain voltage control. Voltage regulators convert and distribute power from an external energy source to the processor. Unfortunately, power conversion loss is inevitable and projected integrated regulator designs are unlikely to eliminate this loss even asymptotically. Reconfigurable power delivery by selective shut-down, i.e., gating, of distributed on-chip regulators in response to spatio-temporal changes in power demand can sustain operation at the minimum conversion loss. However, even the minimum conversion loss is sizable, and as conversion loss gets dissipated as heat, on-chip regulators can easily cause thermal emergencies due to their small footprint. Although reconfigurable distributed on-chip power delivery is emerging as a new design paradigm to enforce sustained operation at minimum possible power conversion loss, thermal implications have been overlooked at the architectural level. This paper hence provides a thermal characterization. We introduce ThermoGater, an architectural governor for a collection of practical, thermally-aware regulator gating policies to mitigate (if not prevent) regulator-induced thermal emergencies, which also consider potential implications for voltage noise. Practical ThermoGater policies can not only sustain minimum power conversion loss throughout execution effectively, but also keep the maximum temperature (thermal gradient) across chip within 0.6°C (0.3°C) on average in comparison to thermally-optimal oracular regulator gating, while the maximum voltage noise stays within 1.0\% of the best case voltage noise profile.
收起
摘要 :
Tailoring the operating voltage to fine-grain temporal changes in the power and performance needs of the workload can effectively enhance power efficiency. Therefore, power-limited computing platforms of today widely deploy integr...
展开
Tailoring the operating voltage to fine-grain temporal changes in the power and performance needs of the workload can effectively enhance power efficiency. Therefore, power-limited computing platforms of today widely deploy integrated (i.e., on-chip) voltage regulation which enables fast fine-grain voltage control. Voltage regulators convert and distribute power from an external energy source to the processor. Unfortunately, power conversion loss is inevitable and projected integrated regulator designs are unlikely to eliminate this loss even asymptotically. Reconfigurable power delivery by selective shut-down, i.e., gating, of distributed on-chip regulators in response to spatio-temporal changes in power demand can sustain operation at the minimum conversion loss. However, even the minimum conversion loss is sizable, and as conversion loss gets dissipated as heat, on-chip regulators can easily cause thermal emergencies due to their small footprint. Although reconfigurable distributed on-chip power delivery is emerging as a new design paradigm to enforce sustained operation at minimum possible power conversion loss, thermal implications have been overlooked at the architectural level. This paper hence provides a thermal characterization. We introduce ThermoGater, an architectural governor for a collection of practical, thermally-aware regulator gating policies to mitigate (if not prevent) regulator-induced thermal emergencies, which also consider potential implications for voltage noise. Practical ThermoGater policies can not only sustain minimum power conversion loss throughout execution effectively, but also keep the maximum temperature (thermal gradient) across chip within 0.6°C (0.3°C) on average in comparison to thermally-optimal oracular regulator gating, while the maximum voltage noise stays within 1.0\% of the best case voltage noise profile.
收起
摘要 :
To predict users' interests, the traditional recommendation system (RS) relies on exploring the explicit user-item ratings and macro implicit feedbacks (e.g., whether or not a user clicks the item). In this work, fine-grained post...
展开
To predict users' interests, the traditional recommendation system (RS) relies on exploring the explicit user-item ratings and macro implicit feedbacks (e.g., whether or not a user clicks the item). In this work, fine-grained post-click behaviors (e.g., mouse behaviors, keyboard events, and page scrolling events) are integrated to alleviate the data sparsity problem of explicit feedback and the data accuracy problem of macro implicit feedback. In the deployed article recommendation pipeline, a variety of post-click behaviors are combined to create a reading pattern model. The reading patterns are leveraged by the recommendation system to estimate users' preference levels. As compared with existing click-based (macro implicit feedback) and dwell time-based (single micro implicit feedback) recommendation systems, the test performance of our designed reading pattern-based RS has been significantly improved in terms of rating prediction and ranking.
收起
摘要 :
To predict users' interests, the traditional recommendation system (RS) relies on exploring the explicit user-item ratings and macro implicit feedbacks (e.g., whether or not a user clicks the item). In this work, fine-grained post...
展开
To predict users' interests, the traditional recommendation system (RS) relies on exploring the explicit user-item ratings and macro implicit feedbacks (e.g., whether or not a user clicks the item). In this work, fine-grained post-click behaviors (e.g., mouse behaviors, keyboard events, and page scrolling events) are integrated to alleviate the data sparsity problem of explicit feedback and the data accuracy problem of macro implicit feedback. In the deployed article recommendation pipeline, a variety of post-click behaviors are combined to create a reading pattern model. The reading patterns are leveraged by the recommendation system to estimate users' preference levels. As compared with existing click-based (macro implicit feedback) and dwell time-based (single micro implicit feedback) recommendation systems, the test performance of our designed reading pattern-based RS has been significantly improved in terms of rating prediction and ranking.
收起
摘要 :
Convolutional neural network (CNN) algorithms are utilized to build a machine learning block to assist the optimizations of voltage noise, temperature distribution, and security of multi-phase on-chip switched-capacitor (SC) volta...
展开
Convolutional neural network (CNN) algorithms are utilized to build a machine learning block to assist the optimizations of voltage noise, temperature distribution, and security of multi-phase on-chip switched-capacitor (SC) voltage converters. All the random sequences generated by the pseudorandom number generator (PRNG) are fed into the designed machine learning block in an SC converter sequentially to filter the unsatisfactory sequences. The results show that the maximum amplitude of the voltage noise and the highest temperature of the SC converter are reduced by 68.98% and 12.07%, respectively, while a negligible security degradation is achieved under the assistance of machine learning.
收起
摘要 :
In internet of things (IoT), ring oscillator physical unclonable functions (ROPUFs) are utilized for designing the wireless sensors against malicious invasive-attacks. However, the ROPUF sensors are not sufficiently secure since t...
展开
In internet of things (IoT), ring oscillator physical unclonable functions (ROPUFs) are utilized for designing the wireless sensors against malicious invasive-attacks. However, the ROPUF sensors are not sufficiently secure since there are strong linear relationships between the supply voltage and the oscillating frequencies of the ring oscillators of the ROPUFs. In order to demonstrate the vulnerability of the ROPUF sensors, in this paper, a hardware Trojan attack is performed by inserting a sequential Trojan circuit into the ROPUF sensors to leak the critical oscillating frequency. As shown in the result, analyzing about 200,000 number of leaked data with machine learning techniques are sufficient to crack a 128-bit Trojan-infected ROPUF sensor. Ultimately, so as to combat the hardware Trojan attack, a Trojan detection methodology is proposed by monitoring the statistical distribution of sensed data in real-time.
收起
摘要 :
Convolutional neural network (CNN) algorithms are utilized to build a machine learning block to assist the optimizations of voltage noise, temperature distribution, and security of multi-phase on-chip switched-capacitor (SC) volta...
展开
Convolutional neural network (CNN) algorithms are utilized to build a machine learning block to assist the optimizations of voltage noise, temperature distribution, and security of multi-phase on-chip switched-capacitor (SC) voltage converters. All the random sequences generated by the pseudorandom number generator (PRNG) are fed into the designed machine learning block in an SC converter sequentially to filter the unsatisfactory sequences. The results show that the maximum amplitude of the voltage noise and the highest temperature of the SC converter are reduced by 68.98% and 12.07%, respectively, while a negligible security degradation is achieved under the assistance of machine learning.
收起
摘要 :
In internet of things (IoT), ring oscillator physical unclonable functions (ROPUFs) are utilized for designing the wireless sensors against malicious invasive-attacks. However, the ROPUF sensors are not sufficiently secure since t...
展开
In internet of things (IoT), ring oscillator physical unclonable functions (ROPUFs) are utilized for designing the wireless sensors against malicious invasive-attacks. However, the ROPUF sensors are not sufficiently secure since there are strong linear relationships between the supply voltage and the oscillating frequencies of the ring oscillators of the ROPUFs. In order to demonstrate the vulnerability of the ROPUF sensors, in this paper, a hardware Trojan attack is performed by inserting a sequential Trojan circuit into the ROPUF sensors to leak the critical oscillating frequency. As shown in the result, analyzing about 200,000 number of leaked data with machine learning techniques are sufficient to crack a 128-bit Trojan-infected ROPUF sensor. Ultimately, so as to combat the hardware Trojan attack, a Trojan detection methodology is proposed by monitoring the statistical distribution of sensed data in real-time.
收起
摘要 :
Side-channel attacks have become a significant threat to the integrated circuit security. Circuit level techniques are proposed in this paper as a countermeasure against side-channel attacks. A distributed on-chip power delivery s...
展开
Side-channel attacks have become a significant threat to the integrated circuit security. Circuit level techniques are proposed in this paper as a countermeasure against side-channel attacks. A distributed on-chip power delivery system consisting of multi-level switched capacitor (SC) voltage converters is proposed where the individual interleaved stages are turned on and turned off either based on the workload information or pseudo-randomly to scramble the power consumption profile. In the case that the changes in the workload demand do not trigger the power delivery system to turn on or off individual stages, the active stages are reshuffled with so called converter-reshuffling to insert random spikes in the power consumption profile. An entropy based metric is developed to evaluate the security-performance of the proposed converter-reshuffling technique as compared to three other existing on-chip power delivery schemes. The increase in the power trace entropy with CoRe scheme is also demonstrated with simulation results to further verify the theoretical analysis.
收起
摘要 :
Side-channel attacks have become a significant threat to the integrated circuit security. Circuit level techniques are proposed in this paper as a countermeasure against side-channel attacks. A distributed on-chip power delivery s...
展开
Side-channel attacks have become a significant threat to the integrated circuit security. Circuit level techniques are proposed in this paper as a countermeasure against side-channel attacks. A distributed on-chip power delivery system consisting of multi-level switched capacitor (SC) voltage converters is proposed where the individual interleaved stages are turned on and turned off either based on the workload information or pseudo-randomly to scramble the power consumption profile. In the case that the changes in the workload demand do not trigger the power delivery system to turn on or off individual stages, the active stages are reshuffled with so called converter-reshuffling to insert random spikes in the power consumption profile. An entropy based metric is developed to evaluate the security-performance of the proposed converter-reshuffling technique as compared to three other existing on-chip power delivery schemes. The increase in the power trace entropy with CoRe scheme is also demonstrated with simulation results to further verify the theoretical analysis.
收起
原文获取